Q31
Q31 A processor is taking too long to execute a set of instructions in a RISC architecture. What is the likely problem?
Improper instruction pipeline
ALU failures
High memory latency
Instruction cache error
Q32
Q32 What is the primary function of the Control Unit in a CPU?
Fetches and decodes instructions
Manages the flow of data
Stores data
Executes arithmetic operations
Q33
Q33 Which of the following components is responsible for executing arithmetic and logic operations in a CPU?
Registers
Control Unit
Memory
Arithmetic Logic Unit (ALU)
Q34
Q34 How does pipelining improve the performance of a CPU?
By increasing clock speed
By reducing instruction length
By executing multiple instructions in parallel
By storing more data
Q35
Q35 In a CPU, what role does the Program Counter (PC) play?
It holds the address of the next instruction to be executed
It stores data
It performs arithmetic operations
It executes instructions
Q36
Q36 What is microprogramming in the context of CPU design?
A way to increase clock speed
A memory optimization technique
A method for designing control units
An input/output mechanism
Q37
Q37 How does a hardwired control unit differ from a microprogrammed control unit?
Hardwired is slower and more flexible
Microprogrammed is faster but less flexible
Both are the same
Hardwired is faster and less flexible
Q38
Q38 Convert the assembly instruction ADD R1, R2 into binary using a simple 3-register CPU instruction format.
110100
101010
000110
010101
Q39
Q39 In an assembly language, what is the purpose of the CMP (compare) instruction?
Adds two registers
Compares two values
Multiplies two registers
Substitutes two values
Q40
Q40 Write an assembly instruction that performs a logical AND between registers R1 and R2.
OR R1, R2
XOR R1, R2
AND R1, R2
ADD R1, R2
Q41
Q41 How would you optimize a sequence of assembly instructions to reduce the number of clock cycles?
By increasing clock speed
By using pipelining
By using more registers
By reducing memory usage
Q42
Q42 A CPU is not executing instructions in the correct sequence. What could be the problem?
Cache failure
ALU failure
Faulty Program Counter
Memory overflow
Q43
Q43 A CPU is taking too long to complete arithmetic operations. What is a likely cause?
Clock speed too fast
Instruction pipeline failure
Faulty control unit
ALU malfunction
Q44
Q44 The CPU control unit is failing to properly coordinate instruction execution. What could be the issue?
Insufficient RAM
ALU overload
Cache memory failure
Microprogramming error
Q45
Q45 What is the primary purpose of cache memory in a computer system?
To increase storage capacity
To execute instructions
To store large amounts of data
To speed up access to frequently used data
Q46
Q46 Which level of the memory hierarchy is typically the fastest?
L2 cache
L3 cache
Main memory
Registers
Q47
Q47 In terms of memory hierarchy, where does DRAM (Dynamic Random Access Memory) typically fall?
Cache memory
Primary storage
Secondary storage
Registers
Q48
Q48 What is the difference between SRAM and DRAM in the memory hierarchy?
DRAM is faster and used for cache
Both are equally fast
SRAM is faster and used for cache
SRAM is used for main memory
Q49
Q49 Which of the following is an example of secondary storage?
Registers
Cache
RAM
Hard disk
Q50
Q50 What is the primary role of virtual memory in a computer system?
To replace cache memory
To reduce memory access time
To increase processor speed
To allow more programs to run than the physical memory can hold
Q51
Q51 Given a CPU with L1, L2, and L3 cache, which cache will be accessed first when data is needed?
L1
L3
None of the above
L2
Q52
Q52 If a CPU fetches data from main memory and places it in L2 cache, what happens if the same data is needed again?
The data will be discarded
The data will be fetched from L2
The data will be fetched from L1
The data will be fetched from main memory
Q53
Q53 A program frequently accesses the same memory location. Which caching technique would optimize performance?
Set-associative mapping
Direct mapping
No caching
Associative mapping
Q54
Q54 A system frequently experiences delays in accessing memory. What could be the issue?
Insufficient cache memory
Faulty hard disk
ALU malfunction
Too many registers
Q55
Q55 A program is suffering from frequent page faults. What is the likely cause?
Too many instructions
Insufficient RAM
Faulty cache
Incorrect opcode
Q56
Q56 The system experiences frequent cache misses despite having a large cache. What could be the reason?
Data access patterns are not localized
ALU malfunction
Too many branches
Too much cache memory
Q57
Q57 What is the main purpose of an I/O controller in a computer system?
To increase memory
To execute instructions
To manage the data exchange between peripheral devices and the CPU
To control the CPU
Q58
Q58 Which of the following I/O techniques involves the CPU waiting for an I/O operation to complete?
Polling
DMA
Memory-mapped I/O
Interrupt-driven I/O
Q59
Q59 What is the advantage of Direct Memory Access (DMA) over other I/O techniques?
It frees the CPU from involvement in data transfer
It speeds up memory access
It increases the cache memory
It allows the CPU to directly control I/O devices
Q60
Q60 Which I/O technique uses interrupt signals to notify the CPU that a device is ready for data transfer?
DMA
Polling
Serial communication
Interrupt-driven I/O
